1. Field of the Invention
The present invention relates to an integrated circuit and an evaluation method for the integrated circuit. More particularly, the invention relates to an integrated circuit having a driver circuit for outputting a high-speed signal to the outside or a receiver circuit for receiving a high-speed signal from the outside, and to an evaluation method for the integrated circuit.
2. Description of Related Art
Signal transmission between integrated circuits is in a tendency toward higher-speed transmission along with the increase in the amount of information (data) to be transmitted. In addition, serial conversion transmission is tried to inhibit an increase in the number of transmission lines and the number of pins in an integrated circuit, and, therefore, the tendency toward higher-speed transmission is further accellerated.
FIG. 1 illustrates a typical example of configuration of small-signal differential transmission based on a conventional integrated circuit, which copes with high-speed signal transmission of 1 Gbps (giga-bits/second). High-speed signal transmission is accomplished by a sending-side integrated circuit 8 including a driver circuit 2, a transmission line 5, a terminal resistor R0, and a receiving-side integrated circuit 9 including a receiver circuit 6.
Data S1 to be transmitted is converted into a differential signal by a differentiating circuit composed of inverters B1 to B9 in the driver circuit 2. A positive-polarity signal of the differential signal is inputted to the gate of a CMOS (complementary metal-oxide semiconductor) transistor M1, and a negative-polarity signal of the differential signal is inputted the gate of a CMOS transistor M2. The CMOS transistors M1 and M2 are source-coupled to each other, and a current I1 is supplied to the sources of the CMOS transistors M1 and M2. Resistors R1 and R2 are connected between the drains of the CMOS transistors M1 and M2 and a power supply VCC, respectively. The drains of the CMOS transistors M2 and M1 are connected to pins P1 and N1 of the integrated circuit 8, respectively, and high-speed signals (P1/N1) are outputted from the integrated circuit 8 via the pins P1 and N1.
The transmission line 5 is connected to the aforementioned pins P1 and N1. The receiving side of the transmission line 5 ends with the terminal resistor R0, and the signals (P1/N1) to be transmitted are connected to pins P4 and N4 of the receiving-side integrated circuit 9.
The signals (P4/N4) having passed through the pins P4 and N4 are inputted to the gates of CMOS transistors M5 and M6 in the receiver circuit 6, respectively. The CMOS transistors M5 and M6 are source-coupled to each other, and a current I3 is supplied to the sources of the CMOS transistors M5 and M6. Resistors R5 and R6 are connected between the drains of the CMOS transistors MS and M6 and a power supply VCC, respectively. Differential receiving signals are obtained at the drains of the CMOS transistors MS and M6. The differential receiving signals are outputted, as signals P5 and N5, to a signal processing circuit (not shown) in the integrated circuit 9 at such a voltage of about 0.5 Vpp as to facilitate handling in the CMOS transistor circuit.
A twisted-pair transmission line available at a relatively low cost is commonly used for the aforementioned transmission line 5. The characteristic impedance between lines of the twisted-pair transmission line is about 100 xcexa9. For the purpose of ensuring matching, the above-mentioned resistors R1 and R2 are set to 50 xcexa9, and the above-mentioned resistor R0 is set to 100 xcexa9. Further, since a transmission amplitude of about 0.3 Vpp is used, the current I1 is set to about 12 mA.
However, the conventional integrated circuit coping with high-speed signal transmission as described above has the following problems to be solved.
In order to confirm the transmission quality of a high-speed signal of 1 Gbps, the user of a particular integrated circuit is required to satisfy very difficult measuring conditions including the measuring device and probing. The particular integrated circuit must be guaranteed for accurate actions. For this purpose, the evaluation of the sending-side integrated circuit 8 and the receiving-side integrated circuit 9 in mass production thereof should be carried out under strict actual operating conditions. For example, the measurement of changes in data at intervals of 1 ns (nano-second) requires a high-accuracy measuring device under 100 ps (pico-second). An IC tester satisfying this function is expensive, so that IC shipping inspections have increased the cost of integrated circuits.
It is an object of the present invention to provide an integrated circuit performing the sending and receiving of high-speed signals and an evaluation method therefor, which permit the achievement of simplified IC evaluation and the prevention of a cost increase of integrated circuits.
It is another object of the invention to provide an integrated circuit and an evaluation method therefor, which enable a user of integrated circuits to conduct stable and high-accuracy measurement without the need for an expensive measuring device and difficult probing, and in addition, make it possible for the user of integrated circuits to easily perform the optimization of a transmission line and a terminal resistor.
To attain the above objects of the invention, in accordance an aspect of the invention, there is provided an integrated circuit, which comprises a driver circuit for outputting a signal outside, a receiver circuit for receiving a signal from outside, and a time-axis expanding circuit for time-axis-expanding an output signal of the receiver circuit.
In accordance with another aspect of the invention, there is provided an integrated circuit, which comprises a receiver circuit for receiving a signal from outside, and a time-axis expanding circuit for time-axis-expanding an output signal of the receiver circuit.
In accordance with a further aspect of the invention, there is provided an evaluation method of evaluating a sending-side integrated circuit, the evaluation method comprising the steps of preparing an inspected integrated circuit including a first driver circuit for outputting a signal outside, a first receiver circuit for receiving a signal from outside, and a first time-axis expanding circuit for time-axis-expanding an output signal of the first receiver circuit, and an inspecting integrated circuit including a second driver circuit having the same configuration as that of the first driver circuit, a second receiver circuit having the same configuration as that of the first receiver circuit, and a second time-axis expanding circuit having the same configuration as that of the first time-axis expanding circuit, connecting the first driver circuit of the inspected integrated circuit to the second receiver circuit of the inspecting integrated circuit by a transmission line and a terminal resistor, inputting a signal to the first driver circuit of the inspected integrated circuit, and measuring a time-axis-expanded signal outputted from the second time-axis expanding circuit of the inspecting integrated circuit, on the basis of a measuring clock signal having a predetermined period, with a counter.
In accordance with a still further aspect of the invention, there is provided an evaluation method of evaluating a receiving-side integrated circuit, the evaluation method comprising the steps of preparing a driver circuit of an integrated circuit for outputting a signal outside, and an inspected integrated circuit including a receiver circuit for receiving a signal from outside, and a time-axis expanding circuit for time-axis-expanding an output signal of the receiver circuit, connecting the driver circuit to the receiver circuit of the inspected integrated circuit by a transmission line and a terminal resistor, inputting a signal to the driver circuit, and measuring a time-axis-expanded signal outputted from the time-axis expanding circuit of the inspected integrated circuit, on the basis of a measuring clock signal having a predetermined period, with a counter.
Since the invention provides configurations in which a time-axis expanding circuit including an equivalent receiver circuit is added to the sending-side integrated circuit, a time-axis expanding circuit using an output from the receiver circuit as an input is added to the receiving-side integrated circuit, and furthermore, each of the time-axis expanding circuits includes a D-type flip-flop circuit, it is possible to simplify the evaluation of ICs as described later.